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VHDL is a language designed to describe digital electronic systems. It emerged from the VHSIC (Very High-Speed Integrated Circuits) program promoted by the Department of Defense of the government of the United States of America. During the program, the lack of a language to describe electronic circuits became apparent. In this way, the VHDL (VHSIC Hardware Design Language) language was developed, which was initially standardized in 1987 by the Institute of Electrical and Electronics Engineers (IEEE) in the United States of America. This standard is known as IEEE Standard 1076-1987.
Later, in 1993, this standard was revised giving rise to the standard known as IEEE Standard 1076-1993 with some changes compared to the previous one. The VHDL language is designed to meet various needs that arise during the design process. It allows a functional or behavioral description of the circuit to be made, using procedural and familiar programming techniques.
It allows describing the structure of the design and declaring the entities and sub-entities that make it up, specifying a hierarchy between them and how their interconnections are. Finally, it allows the design to be simulated and synthesized with special synthesis tools, allowing it to be manufactured and encapsulated as a microcircuit. One aspect that is important to highlight is that thanks to this type of language, the component prototyping phase is eliminated, which reduces design and production costs.
A VHDL project can contain many files. VHDL code is usually found in files with the * .vhd extension. The typical structure of one of these files is:
There are two ways to describe a circuit; On the one hand, a circuit can be described indicating the different components that make it up and their interconnection, in this way we have specified a circuit and we know how it works; This is the usual way in which circuits have been described and the tools used to do so have been schematic capture and Netlist descriptions.
The second way is to describe a circuit indicating what it does or how it works, that is, describing its behavior. Naturally, this way of describing a circuit is much better for a designer since what matters is the operation of the circuit rather than its components. On the other hand, being far from what a circuit is, it can pose some problems when making a circuit based on the description of its behavior. VHDL is going to be interesting since it will allow both types of descriptions:
Structure: VHDL can be used as a normal and current Netlist language where the system components are specified on the one hand and their interconnections on the other.
Behavior: VHDL can also be used for the behavioral or functional description of a circuit. This is what distinguishes it from a Netlist language.
Without having to know the internal structure of a circuit, it is possible to describe it by explaining its functionality. This is especially useful in the simulation since it allows simulating a system without knowing its internal structure, but this type of description is becoming more and more important every day because current synthesis tools allow the automatic creation of circuits from a description of its operation.
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